LATTICE ICE40LP1K CM49TR

Приложения

FPGA

Описание

Flexible Logic Architecture

Five devices with 384 to 7,680 LUT4s and 10 to 206 I/Os

Ultra Low Power Devices

Advanced 40 nm low power process

As low as 21 µA standby power

Programmable low swing differential I/Os

Embedded and Distributed Memory

Up to 128 kbits sysMEM™ Embedded Block RAM

Pre-Engineered Source Synchronous I/O

DDR registers in I/O cells

High Current LED Drivers

Three High Current Drivers used for three different

LEDs or one RGB LED

High Performance, Flexible I/O Buffer

Programmable sysIO™ buffer supports wide

range of interfaces:

— LVCMOS 3.3/2.5/1.8

— LVDS25E, subLVDS