Информации заказа
Производитель |
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Номер в каталоге производителя |
W9425G6JH-5I |
Категория продукта |
4 M x 4 BANKS x 16 BITS DDR SDRAM |
Лист данных |
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Изображение |
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Характеристики 2.5V ± 0.2V Power Supply for DDR400 2.4V~2.7V Power Supply for DDR500 Up to 250 MHz Clock Frequency Double Data Rate architecture; two data transfers per clock cycle Differential clock inputs (CLK and CLK) DQS is edge-aligned with data for Read; center-aligned with data for Write CAS Latency: 2, 2.5, 3 and 4 Burst Length: 2, 4 and 8 Auto Refresh and Self Refresh Precharged Power Down and Active Power Down Write Data Mask Write Latency = 1 7.8µS refresh interval (8K/64 mS refresh) Maximum burst refresh cycle: 8 Interface: SSTL_2 Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant |