CYPRESS CY7C1357C-133AXC Стат. ОЗУ 9Mb 133Mhz 512K x 18 Flow-Thru Стат. ОЗУ

CYPRESS CY7C1357C-133AXC Стат. ОЗУ 9Mb 133Mhz 512K x 18 Flow-Thru Стат. ОЗУ 

Features

No Bus Latency™ (NoBL™) architecture eliminates dead

cycles between write and read cycles

Can support up to 133-MHz bus operations with zero wait states

Data is transferred on every clock

Pin compatible and functionally equivalent to ZBT™ devices

Internally self-timed output buffer control to eliminate the need to use OE

Registered inputs for flow-through operation

Byte write capability

3.3 V / 2.5 V I/O power supply (VDDQ)

Fast clock-to-output times

6.5 ns (for 133-MHz device)

Clock enable (CEN) pin to enable clock and suspend operation

Synchronous self-timed writes

Asynchronous output enable

From: www.rumjd.com/news